power_play/src/gpu/gpu.h

377 lines
14 KiB
C

////////////////////////////////
//~ Opaque types
Struct(GPU_Resource);
Struct(GPU_CommandList);
Struct(GPU_Swapchain);
////////////////////////////////
//~ Queue types
#define GPU_MultiQueueEnabled !ProfilingIsEnabled
Enum(GPU_QueueKind)
{
#if GPU_MultiQueueEnabled
GPU_QueueKind_Direct = 0,
GPU_QueueKind_Compute = 1,
GPU_QueueKind_Copy = 2,
GPU_QueueKind_BackgroundCopy = 3,
GPU_NumQueues = 4
#else
GPU_QueueKind_Direct = 0,
GPU_QueueKind_Compute = 0,
GPU_QueueKind_Copy = 0,
GPU_QueueKind_BackgroundCopy = 0,
GPU_NumQueues = 1
#endif
};
////////////////////////////////
//~ Format types
/* NOTE: Matches DXGI_FORMAT */
Enum(GPU_Format)
{
GPU_Format_Unknown = 0,
GPU_Format_R32G32B32A32_Typeless = 1,
GPU_Format_R32G32B32A32_Float = 2,
GPU_Format_R32G32B32A32_Uint = 3,
GPU_Format_R32G32B32A32_Sint = 4,
GPU_Format_R32G32B32_Typeless = 5,
GPU_Format_R32G32B32_Float = 6,
GPU_Format_R32G32B32_Uint = 7,
GPU_Format_R32G32B32_Sint = 8,
GPU_Format_R16G16B16A16_Typeless = 9,
GPU_Format_R16G16B16A16_Float = 10,
GPU_Format_R16G16B16A16_Unorm = 11,
GPU_Format_R16G16B16A16_Uint = 12,
GPU_Format_R16G16B16A16_Snorm = 13,
GPU_Format_R16G16B16A16_Sint = 14,
GPU_Format_R32G32_Typeless = 15,
GPU_Format_R32G32_Float = 16,
GPU_Format_R32G32_Uint = 17,
GPU_Format_R32G32_Sint = 18,
GPU_Format_R32G8X24_Typeless = 19,
GPU_Format_D32_Float_S8X24_Uint = 20,
GPU_Format_R32_Float_X8X24_Typeless = 21,
GPU_Format_X32_Typeless_G8X24_Uint = 22,
GPU_Format_R10G10B10A2_Typeless = 23,
GPU_Format_R10G10B10A2_Unorm = 24,
GPU_Format_R10G10B10A2_Uint = 25,
GPU_Format_R11G11B10_Float = 26,
GPU_Format_R8G8B8A8_Typeless = 27,
GPU_Format_R8G8B8A8_Unorm = 28,
GPU_Format_R8G8B8A8_Unorm_Srgb = 29,
GPU_Format_R8G8B8A8_Uint = 30,
GPU_Format_R8G8B8A8_Snorm = 31,
GPU_Format_R8G8B8A8_Sint = 32,
GPU_Format_R16G16_Typeless = 33,
GPU_Format_R16G16_Float = 34,
GPU_Format_R16G16_Unorm = 35,
GPU_Format_R16G16_Uint = 36,
GPU_Format_R16G16_Snorm = 37,
GPU_Format_R16G16_Sint = 38,
GPU_Format_R32_Typeless = 39,
GPU_Format_D32_Float = 40,
GPU_Format_R32_Float = 41,
GPU_Format_R32_Uint = 42,
GPU_Format_R32_Sint = 43,
GPU_Format_R24G8_Typeless = 44,
GPU_Format_D24_Unorm_S8_Uint = 45,
GPU_Format_R24_Unorm_X8_Typeless = 46,
GPU_Format_X24_Typeless_G8_Uint = 47,
GPU_Format_R8G8_Typeless = 48,
GPU_Format_R8G8_Unorm = 49,
GPU_Format_R8G8_Uint = 50,
GPU_Format_R8G8_Snorm = 51,
GPU_Format_R8G8_Sint = 52,
GPU_Format_R16_Typeless = 53,
GPU_Format_R16_Float = 54,
GPU_Format_D16_Unorm = 55,
GPU_Format_R16_Unorm = 56,
GPU_Format_R16_Uint = 57,
GPU_Format_R16_Snorm = 58,
GPU_Format_R16_Sint = 59,
GPU_Format_R8_Typeless = 60,
GPU_Format_R8_Unorm = 61,
GPU_Format_R8_Uint = 62,
GPU_Format_R8_Snorm = 63,
GPU_Format_R8_Sint = 64,
GPU_Format_A8_Unorm = 65,
GPU_Format_R1_Unorm = 66,
GPU_Format_R9G9B9E5_SharedXP = 67,
GPU_Format_R8G8_B8G8_Unorm = 68,
GPU_Format_G8R8_G8B8_Unorm = 69,
GPU_Format_BC1_Typeless = 70,
GPU_Format_BC1_Unorm = 71,
GPU_Format_BC1_Unorm_Srgb = 72,
GPU_Format_BC2_Typeless = 73,
GPU_Format_BC2_Unorm = 74,
GPU_Format_BC2_Unorm_Srgb = 75,
GPU_Format_BC3_Typeless = 76,
GPU_Format_BC3_Unorm = 77,
GPU_Format_BC3_Unorm_Srgb = 78,
GPU_Format_BC4_Typeless = 79,
GPU_Format_BC4_Unorm = 80,
GPU_Format_BC4_Snorm = 81,
GPU_Format_BC5_Typeless = 82,
GPU_Format_BC5_Unorm = 83,
GPU_Format_BC5_Snorm = 84,
GPU_Format_B5G6R5_Unorm = 85,
GPU_Format_B5G5R5A1_Unorm = 86,
GPU_Format_B8G8R8A8_Unorm = 87,
GPU_Format_B8G8R8X8_Unorm = 88,
GPU_Format_R10G10B10_XR_BIAS_A2_Unorm = 89,
GPU_Format_B8G8R8A8_Typeless = 90,
GPU_Format_B8G8R8A8_Unorm_Srgb = 91,
GPU_Format_B8G8R8X8_Typeless = 92,
GPU_Format_B8G8R8X8_Unorm_Srgb = 93,
GPU_Format_BC6H_Typeless = 94,
GPU_Format_BC6H_UF16 = 95,
GPU_Format_BC6H_SF16 = 96,
GPU_Format_BC7_Typeless = 97,
GPU_Format_BC7_Unorm = 98,
GPU_Format_BC7_Unorm_Srgb = 99,
GPU_Format_AYUV = 100,
GPU_Format_Y410 = 101,
GPU_Format_Y416 = 102,
GPU_Format_NV12 = 103,
GPU_Format_P010 = 104,
GPU_Format_P016 = 105,
GPU_Format_420_Opaque = 106,
GPU_Format_YUY2 = 107,
GPU_Format_Y210 = 108,
GPU_Format_Y216 = 109,
GPU_Format_NV11 = 110,
GPU_Format_AI44 = 111,
GPU_Format_IA44 = 112,
GPU_Format_P8 = 113,
GPU_Format_A8P8 = 114,
GPU_Format_B4G4R4A4_Unorm = 115,
GPU_Format_P208 = 130,
GPU_Format_V208 = 131,
GPU_Format_V408 = 132,
GPU_Format_SAMPLER_FEEDBACK_MIN_MIP_Opaque = 189,
GPU_Format_SAMPLER_FEEDBACK_MIP_REGION_USED_Opaque = 190,
GPU_Format_A4B4G4R4_Unorm = 191,
GPU_Format_Count = 192
};
////////////////////////////////
//~ Resource types
#define GPU_MaxRenderTargets 8
Enum(GPU_ResourceKind)
{
GPU_ResourceKind_Buffer,
GPU_ResourceKind_Texture1D,
GPU_ResourceKind_Texture2D,
GPU_ResourceKind_Texture3D,
GPU_ResourceKind_Sampler
};
Enum(GPU_ResourceFlag)
{
GPU_ResourceFlag_None = 0,
GPU_ResourceFlag_AllowUav = (1 << 0),
GPU_ResourceFlag_AllowRtv = (1 << 1),
};
Enum(GPU_HeapKind)
{
GPU_HeapKind_Default,
GPU_HeapKind_Upload,
GPU_HeapKind_Download
};
Enum(GPU_ReleaseFlag)
{
GPU_ReleaseFlag_None = 0,
GPU_ReleaseFlag_Reuse = (1 << 0)
};
Enum(GPU_ResourceIdKind)
{
GPU_ResourceIdKind_None,
GPU_ResourceIdKind_Srv,
GPU_ResourceIdKind_Uav,
GPU_ResourceIdKind_Sampler,
};
Struct(GPU_ResourceDesc)
{
GPU_ResourceKind kind;
GPU_ResourceFlag flags;
union
{
struct
{
GPU_Format format;
Vec3I32 size;
i32 mip_levels;
} texture;
struct
{
GPU_HeapKind heap_kind;
u32 size;
u32 element_count;
u32 element_size;
} buffer;
};
};
Struct(GPU_Mapped)
{
GPU_Resource *resource;
void *mem;
};
////////////////////////////////
//~ Rasterizer types
Enum(GPU_RasterizeMode)
{
GPU_RasterizeMode_None,
GPU_RasterizeMode_PointList,
GPU_RasterizeMode_LineList,
GPU_RasterizeMode_LineStrip,
GPU_RasterizeMode_TriangleList,
GPU_RasterizeMode_TriangleStrip,
};
Struct(GPU_Viewport)
{
f32 top_left_x;
f32 top_left_y;
f32 width;
f32 height;
f32 min_depth;
f32 max_depth;
};
Struct(GPU_Scissor)
{
f32 left;
f32 top;
f32 right;
f32 bottom;
};
////////////////////////////////
//~ Memory info types
Struct(GPU_MemoryInfo)
{
i32 _;
};
////////////////////////////////
//~ @hookdecl Startup
void GPU_Startup(void);
////////////////////////////////
//~ @hookdecl Fence operations
Fence *GPU_FenceFromQueue(GPU_QueueKind queue_kind);
////////////////////////////////
//~ @hookdecl Rasterizer helpers
GPU_Viewport GPU_ViewportFromRect(Rect rect);
GPU_Scissor GPU_ScissorFromRect(Rect rect);
////////////////////////////////
//~ @hookdecl Resource operations
GPU_Resource *GPU_AcquireResource(GPU_ResourceDesc desc);
void GPU_ReleaseResource(GPU_Resource *resource, GPU_ReleaseFlag flags);
u32 GPU_GetResourceId(GPU_Resource *resource, GPU_ResourceIdKind kind);
Vec2I32 GPU_GetTextureSize(GPU_Resource *resource);
////////////////////////////////
//~ @hookdecl Command list operations
GPU_CommandList *GPU_BeginCommandList(GPU_QueueKind queue_kind);
i64 GPU_EndCommandList(GPU_CommandList *cl); /* Returns the value that the queue's fence will be set to once the command is completed */
////////////////////////////////
//~ @hookdecl Profiling helpers
void GPU_ProfN(GPU_CommandList *cl, String name);
////////////////////////////////
//~ @hookdecl Resource barrier operations
void GPU_TransitionToSrv(GPU_CommandList *cl, GPU_Resource *resource);
void GPU_TransitionToUav(GPU_CommandList *cl, GPU_Resource *resource);
void GPU_TransitionToRtv(GPU_CommandList *cl, GPU_Resource *resource);
void GPU_FlushUav(GPU_CommandList *cl, GPU_Resource *resource);
////////////////////////////////
//~ @hookdecl Dispatch operations
void GPU_ClearResource(GPU_CommandList *cl, GPU_Resource *resource, Vec4 clear_value);
#define GPU_Rasterize(cl, sig_ptr, vs, ps, rts_count, rts, viewport, scissor, instances_count, index_buffer, mode) \
GPU_Rasterize_((cl), sizeof(*(sig_ptr)), (sig_ptr), (vs), (ps), (rts_count), (rts), (viewport), (scissor), (instances_count), (index_buffer), (mode))
#define GPU_Compute(cl, sig_ptr, cs, x, y, z) GPU_Compute_((cl), sizeof(*(sig_ptr)), (sig_ptr), (cs), (x), (y), (z))
void GPU_Rasterize_(GPU_CommandList *cl,
u32 sig_size,
void *sig,
VertexShader vs,
PixelShader ps,
u32 rts_count,
GPU_Resource **rts,
GPU_Viewport viewport,
GPU_Scissor scissor,
u32 instances_count,
GPU_Resource *index_buffer,
GPU_RasterizeMode mode);
void GPU_Compute_(GPU_CommandList *cl,
u32 sig_size,
void *sig,
ComputeShader cs,
u32 num_threads_x,
u32 num_threads_y,
u32 num_threads_z);
////////////////////////////////
//~ @hookdecl Resource copy operations
void GPU_CopyResource(GPU_CommandList *cl, GPU_Resource *dst, GPU_Resource *src);
////////////////////////////////
//~ @hookdecl Map operations
GPU_Mapped GPU_Map(GPU_Resource *r);
void GPU_Unmap(GPU_Mapped mapped);
void GPU_CopyToMapped(GPU_Mapped mapped, String data);
////////////////////////////////
//~ @hookdecl Memory info operations
GPU_MemoryInfo GPU_QueryMemoryInfo(void);
////////////////////////////////
//~ @hookdecl Swapchain operations
GPU_Swapchain *GPU_AcquireSwapchain(P_Window *window, Vec2I32 size);
void GPU_ReleaseSwapchain(GPU_Swapchain *swapchain);
/* Waits until a new backbuffer is ready to be written to.
* This should be called before rendering for minimum latency. */
void GPU_YieldOnSwapchain(GPU_Swapchain *swapchain);
/* 1. Ensures the backbuffer matches the size of `texture`
* 2. Blits `texture` to the backbuffer
* 3. Presents the backbuffer
* 4. Returns the value that the Direct queue fence will reach once GPU completes blitting (`texture` shouldn't be released while blit is in flight) */
i64 GPU_PresentSwapchain(GPU_Swapchain *swapchain, GPU_Resource *texture, i32 vsync);