diff --git a/src/gpu/gpu_core.h b/src/gpu/gpu_core.h
index 5f7489c6..9cdea283 100644
--- a/src/gpu/gpu_core.h
+++ b/src/gpu/gpu_core.h
@@ -251,14 +251,16 @@ Enum(G_Layout)
 
   G_Layout_Undefined,                          // No access                                       <-- D3D12_BARRIER_LAYOUT_UNDEFINED
 
+  //////////////////////////////
+  //- Queue-agnostic
+
   // Simultaneous layout allows a resource to be used on any queue with any
   // access type (except depth-stencil). Resources cannot transition to/from
   // this layout, they must be created with it. Allows concurrent reads
-  // while up to 1 write is occuring to non-overlapping regions.
+  // with up to 1 write to non-overlapping regions.
 
   G_Layout_Simultaneous,                       // Any access except depth-stencil                 <-- D3D12_BARRIER_LAYOUT_COMMON + D3D12_RESOURCE_FLAG_ALLOW_SIMULTANEOUS_ACCESS
 
-
   G_Layout_Common,                             // ShaderRead/CopyRead/CopyWrite/Present           <-- D3D12_BARRIER_LAYOUT_COMMON
 
   //////////////////////////////
@@ -283,7 +285,7 @@ Enum(G_Layout)
   G_Layout_DirectComputeQueue_CopyWrite,       // CopyWrite                                       <-- D3D12_BARRIER_LAYOUT_COPY_DEST
 };
 
-// Barrier will execute after previous stages specified by `stage_prev`, and before next stages specified by `stage_next`.
+// Barrier will execute after stages specified by `stage_prev`, and before stages specified by `stage_next`.
 // When barrier executes:
 //   - Necessary resource flushes will occur based on `access_prev` & `access_next`
 //   - Texture layout will transition based on `layout` (if specified)
@@ -296,7 +298,7 @@ Struct(G_MemoryBarrierDesc)
   G_Access access_prev;
   G_Access access_next;
   G_Layout layout;
-  RngI32 mips;  // Inclusive range of texture mip indices to sync
+  RngI32 mips;  // Inclusive range of texture mip levels to sync
 };
 
 ////////////////////////////////////////////////////////////