diff --git a/src/base/base.h b/src/base/base.h index 35700477..421141a2 100644 --- a/src/base/base.h +++ b/src/base/base.h @@ -727,6 +727,13 @@ Struct(U128) //////////////////////////////////////////////////////////// //~ Shader types +/* D3D12 - 64 maximum root constants + * Vulkan - 32 maximum push constants + */ +#define MaxShaderConstants (32) + +#define ShaderConstant(type, name) name##__shaderconst__##type + #if IsLanguageC //- Shader linkage @@ -762,27 +769,17 @@ Struct(U128) //- Shader object handles - typedef StructuredBufferHandle u32; - typedef RWStructuredBufferHandle u32; - typedef Texture1DHandle u32; - typedef RWTexture1DHandle u32; - typedef Texture2DHandle u32; - typedef RWTexture2DHandle u32; - typedef Texture3DHandle u32; - typedef RWTexture3DHandle u32; - typedef SamplerHandle u32; + typedef u32 StructuredBufferHandle; + typedef u32 RWStructuredBufferHandle; + typedef u32 Texture1DHandle; + typedef u32 RWTexture1DHandle; + typedef u32 Texture2DHandle; + typedef u32 RWTexture2DHandle; + typedef u32 Texture3DHandle; + typedef u32 RWTexture3DHandle; + typedef u32 SamplerHandle; #define IsGpuHandleNil(h) ((h) == 0) - - //- Pointer dereference - - #define StructuredBufferFromUniformHandle(h) ResourceDescriptorHeap[h] - #define TextureFromUniformHandle(h) ResourceDescriptorHeap[h] - #define SamplerFromUniformHandle(h) SamplerDescriptorHeap[h] - - #define StructuredBufferFromNonUniformHandle(h) ResourceDescriptorHeap[NonUniformResourceIndex(h)] - #define TextureFromNonUniformHandle(h) ResourceDescriptorHeap[NonUniformResourceIndex(h)] - #define SamplerFromNonUniformHandle(h) SamplerDescriptorHeap[NonUniformResourceIndex(h)] #endif //////////////////////////////////////////////////////////// diff --git a/src/base/base_gpu.h b/src/base/base_gpu.h new file mode 100644 index 00000000..3e724873 --- /dev/null +++ b/src/base/base_gpu.h @@ -0,0 +1,136 @@ +//////////////////////////////////////////////////////////// +//~ Gpu math types + +#define Pi ((f32)3.14159265358979323846) +#define Tau ((f32)6.28318530717958647693) +#define GoldenRatio ((f32)1.61803398874989484820) + +typedef float2 Vec2; +typedef float3 Vec3; +typedef float4 Vec4; +typedef int2 Vec2I32; +typedef int3 Vec3I32; +typedef int4 Vec4I32; +typedef uint2 Vec2U32; +typedef uint3 Vec3U32; +typedef uint4 Vec4U32; +typedef float2x3 Xform; +typedef float4 Rect; +typedef float4 ClipRect; +typedef float4 Aabb; +typedef float4 Quad; +typedef float4x4 Mat4x4; + +//////////////////////////////////////////////////////////// +//~ Root constants + +Struct(RootConstants_f32) { f32 c[MaxShaderConstants]; }; +Struct(RootConstants_u32) { u32 c[MaxShaderConstants]; }; +Struct(RootConstants_StructuredBufferHandle) { StructuredBufferHandle c[MaxShaderConstants]; }; +Struct(RootConstants_RWStructuredBufferHandle) { RWStructuredBufferHandle c[MaxShaderConstants]; }; +Struct(RootConstants_Texture1DHandle) { Texture1DHandle c[MaxShaderConstants]; }; +Struct(RootConstants_RWTexture1DHandle) { RWTexture1DHandle c[MaxShaderConstants]; }; +Struct(RootConstants_Texture2DHandle) { Texture2DHandle c[MaxShaderConstants]; }; +Struct(RootConstants_RWTexture2DHandle) { RWTexture2DHandle c[MaxShaderConstants]; }; +Struct(RootConstants_Texture3DHandle) { Texture3DHandle c[MaxShaderConstants]; }; +Struct(RootConstants_RWTexture3DHandle) { RWTexture3DHandle c[MaxShaderConstants]; }; +Struct(RootConstants_SamplerHandle) { SamplerHandle c[MaxShaderConstants]; }; + +ConstantBuffer g_root_constants_f32 : register(b0); +ConstantBuffer g_root_constants_u32 : register(b0); +ConstantBuffer g_root_constants_StructuredBufferHandle : register(b0); +ConstantBuffer g_root_constants_RWStructuredBufferHandle : register(b0); +ConstantBuffer g_root_constants_Texture1DHandle : register(b0); +ConstantBuffer g_root_constants_RWTexture1DHandle : register(b0); +ConstantBuffer g_root_constants_Texture2DHandle : register(b0); +ConstantBuffer g_root_constants_RWTexture2DHandle : register(b0); +ConstantBuffer g_root_constants_Texture3DHandle : register(b0); +ConstantBuffer g_root_constants_RWTexture3DHandle : register(b0); +ConstantBuffer g_root_constants_SamplerHandle : register(b0); + +#define GetConstant(type, name) (g_root_constants_##type.c[ShaderConstant(type, name)]) + +//////////////////////////////////////////////////////////// +//~ Handle dereference + +#define ResourceFromUniformHandle(h) ResourceDescriptorHeap[(h)] +#define ResourceFromNonUniformHandle(h) ResourceDescriptorHeap[NonUniformResourceIndex(h)] +#define ResourceFromConstantHandle(type, name) ResourceFromUniformHandle(GetConstant(type, name)) + +#define SamplerFromUniformHandle(h) SamplerDescriptorHeap[(h)] +#define SamplerFromNonUniformHandle(h) SamplerDescriptorHeap[NonUniformResourceIndex(h)] +#define SamplerFromConstantHandle(type, name) SamplerFromUniformHandle(GetConstant(type, name)) + +//////////////////////////////////////////////////////////// +//~ Texture dimension helpers + +u32 Count1D(Texture1D tex) +{ + u32 result; + tex.GetDimensions(result.x); + return result; +} + +template +u32 Count1D(RWTexture1D tex) +{ + u32 result; + tex.GetDimensions(result.x); + return result; +} + +Vec2U32 Count2D(Texture2D tex) +{ + Vec2U32 result; + tex.GetDimensions(result.x, result.y); + return result; +} + +template +Vec2U32 Count2D(RWTexture2D tex) +{ + Vec2U32 result; + tex.GetDimensions(result.x, result.y); + return result; +} + +Vec3U32 Count3D(Texture3D tex) +{ + Vec3U32 result; + tex.GetDimensions(result.x, result.y, result.z); + return result; +} + +template +Vec3U32 Count3D(RWTexture3D tex) +{ + Vec3U32 result; + tex.GetDimensions(result.x, result.y, result.z); + return result; +} + +//////////////////////////////////////////////////////////// +//~ Vertex ID helpers + +Vec2 RectUvFromVertexId(u32 id) +{ + static const Vec2 uvs[4] = { + Vec2(0, 0), + Vec2(1, 0), + Vec2(1, 1), + Vec2(0, 1) + }; + return uvs[id]; +} + +//////////////////////////////////////////////////////////// +//~ Ndc helpers + +Vec2 NdcFromPos(Vec2 pos, Vec2 size) +{ + Vec2 result; + result = pos / size; + result *= Vec2(2, -2); + result += Vec2(-1, 1); + return result; +} diff --git a/src/base/base_inc.h b/src/base/base_inc.h index 4f471bad..4abd583b 100644 --- a/src/base/base_inc.h +++ b/src/base/base_inc.h @@ -27,7 +27,7 @@ # include "base_resource.h" # include "base_controller.h" #elif IsLanguageGpu -# include "base_math_gpu.h" +# include "base_gpu.h" #endif //- Impl diff --git a/src/base/base_math_gpu.h b/src/base/base_math_gpu.h deleted file mode 100644 index 8399bc57..00000000 --- a/src/base/base_math_gpu.h +++ /dev/null @@ -1,51 +0,0 @@ -//////////////////////////////////////////////////////////// -//~ Gpu math constants - -#define Pi ((f32)3.14159265358979323846) -#define Tau ((f32)6.28318530717958647693) -#define GoldenRatio ((f32)1.61803398874989484820) - -//////////////////////////////////////////////////////////// -//~ Gpu math types - -typedef float2 Vec2; -typedef float3 Vec3; -typedef float4 Vec4; -typedef int2 Vec2I32; -typedef int3 Vec3I32; -typedef int4 Vec4I32; -typedef uint2 Vec2U32; -typedef uint3 Vec3U32; -typedef uint4 Vec4U32; -typedef float2x3 Xform; -typedef float4 Rect; -typedef float4 ClipRect; -typedef float4 Aabb; -typedef float4 Quad; -typedef float4x4 Mat4x4; - -//////////////////////////////////////////////////////////// -//~ Vertex ID helpers - -Vec2 RectUvFromVertexId(u32 id) -{ - static const Vec2 uvs[4] = { - Vec2(0, 0), - Vec2(1, 0), - Vec2(1, 1), - Vec2(0, 1) - }; - return uvs[id]; -} - -//////////////////////////////////////////////////////////// -//~ Ndc helpers - -Vec2 NdcFromPos(Vec2 pos, Vec2 size) -{ - Vec2 result; - result = pos / size; - result *= Vec2(2, -2); - result += Vec2(-1, 1); - return result; -} diff --git a/src/gpu/gpu_core.h b/src/gpu/gpu_core.h index 5b853972..f68e56c9 100644 --- a/src/gpu/gpu_core.h +++ b/src/gpu/gpu_core.h @@ -165,36 +165,36 @@ Enum(GPU_Format) Enum(GPU_Stage) { - GPU_Stage_None = 0, + GPU_Stage_None = 0, /* Compute stages */ - GPU_Stage_ComputeShading = (1 << 1), + GPU_Stage_ComputeShading = (1 << 1), /* Draw stages */ - GPU_Stage_IndexAssembly = (1 << 2), - GPU_Stage_VertexShading = (1 << 3), - GPU_Stage_PixelShading = (1 << 4), - GPU_Stage_DepthStencil = (1 << 5), - GPU_Stage_RenderTarget = (1 << 6), + GPU_Stage_IndexAssembly = (1 << 2), + GPU_Stage_VertexShading = (1 << 3), + GPU_Stage_PixelShading = (1 << 4), + GPU_Stage_DepthStencil = (1 << 5), + GPU_Stage_RenderTarget = (1 << 6), /* Copy stages */ - GPU_Stage_Copy = (1 << 7), + GPU_Stage_Copy = (1 << 7), /* Indirect stages */ - GPU_Stage_Indirect = (1 << 8), + GPU_Stage_Indirect = (1 << 8), /* Aggregate stages */ - GPU_Stage_AllDraw = GPU_Stage_IndexAssembly | - GPU_Stage_VertexShading | - GPU_Stage_PixelShading | - GPU_Stage_DepthStencil | - GPU_Stage_RenderTarget, + GPU_Stage_AllDraw = GPU_Stage_IndexAssembly | + GPU_Stage_VertexShading | + GPU_Stage_PixelShading | + GPU_Stage_DepthStencil | + GPU_Stage_RenderTarget, - GPU_Stage_AllShading = GPU_Stage_ComputeShading | - GPU_Stage_VertexShading | - GPU_Stage_PixelShading, + GPU_Stage_AllShading = GPU_Stage_ComputeShading | + GPU_Stage_VertexShading | + GPU_Stage_PixelShading, - GPU_Stage_All = 0xFFFFFFFF + GPU_Stage_All = 0xFFFFFFFF }; Enum(GPU_Access) @@ -207,12 +207,12 @@ Enum(GPU_Access) GPU_Access_CopyWrite = (1 << 3), GPU_Access_CopyRead = (1 << 4), - GPU_Access_IndexBuffer = (1 << 5), - GPU_Access_IndirectArgument = (1 << 6), + GPU_Access_DepthStencilRead = (1 << 5), + GPU_Access_DepthStencilWrite = (1 << 6), + GPU_Access_RenderTargetWrite = (1 << 7), - GPU_Access_DepthStencilRead = (1 << 7), - GPU_Access_DepthStencilWrite = (1 << 8), - GPU_Access_RenderTargetWrite = (1 << 9), + GPU_Access_IndexBuffer = (1 << 8), + GPU_Access_IndirectArgument = (1 << 9), GPU_Access_All = 0xFFFFFFFF }; @@ -288,18 +288,23 @@ Struct(GPU_BarrierDesc) }; //////////////////////////////////////////////////////////// -//~ Buffer types +//~ Resource types -Enum(GPU_BufferFlag) +Enum(GPU_ResourceFlag) { - GPU_BufferFlag_None = 0, - GPU_BufferFlag_Writable = (1 << 0), + GPU_ResourceFlag_None = 0, + GPU_ResourceFlag_AllowShaderReadWrite = (1 << 0), + GPU_ResourceFlag_AllowRenderTarget = (1 << 1), + GPU_ResourceFlag_AllowDepthStencil = (1 << 2), }; +//////////////////////////////////////////////////////////// +//~ Buffer types + Struct(GPU_BufferDesc) { u64 size; - GPU_BufferFlag flags; + GPU_ResourceFlag flags; }; //////////////////////////////////////////////////////////// @@ -307,13 +312,6 @@ Struct(GPU_BufferDesc) #define GPU_MaxRenderTargets 8 -Enum(GPU_TextureFlag) -{ - GPU_TextureFlag_None = 0, - GPU_TextureFlag_AllowWritable = (1 << 0), - GPU_TextureFlag_AllowRenderTarget = (1 << 1), -}; - Enum(GPU_TextureKind) { GPU_TextureKind_1D, @@ -324,9 +322,9 @@ Enum(GPU_TextureKind) Struct(GPU_TextureDesc) { GPU_TextureKind kind; + GPU_ResourceFlag flags; GPU_Format format; Vec3I32 dims; - GPU_TextureFlag flags; GPU_Layout initial_layout; i32 mip_levels; /* Will be clamped to range [1, max] */ Vec4 clear_color; @@ -515,34 +513,34 @@ b32 GPU_IsResourceNil(GPU_ResourceHandle handle); } \ ) -#define GPU_PushTexture1D(arena, _format, _size, _initial_layout) GPU_PushTextureEx((arena), \ - (GPU_TextureDesc) { \ - .kind = GPU_TextureKind_1D, \ - .format = (_format), \ - .dims = VEC3I32((_size), 1, 1), \ - .initial_layout = (_initial_layout), \ - __VA_ARGS__ \ - } \ +#define GPU_PushTexture1D(arena, _format, _size, _initial_layout, ...) GPU_PushTextureEx((arena), \ + (GPU_TextureDesc) { \ + .kind = GPU_TextureKind_1D, \ + .format = (_format), \ + .dims = VEC3I32((_size), 1, 1), \ + .initial_layout = (_initial_layout), \ + __VA_ARGS__ \ + } \ ) -#define GPU_PushTexture2D(arena, _format, _size, _initial_layout) GPU_PushTextureEx((arena), \ - (GPU_TextureDesc) { \ - .kind = GPU_TextureKind_2D, \ - .format = (_format), \ - .dims = VEC3I32((_size).x, (_size).y, 1), \ - .initial_layout = (_initial_layout), \ - __VA_ARGS__ \ - } \ +#define GPU_PushTexture2D(arena, _format, _size, _initial_layout, ...) GPU_PushTextureEx((arena), \ + (GPU_TextureDesc) { \ + .kind = GPU_TextureKind_2D, \ + .format = (_format), \ + .dims = VEC3I32((_size).x, (_size).y, 1), \ + .initial_layout = (_initial_layout), \ + __VA_ARGS__ \ + } \ ) -#define GPU_PushTexture3D(arena, _format, _size, _initial_layout) GPU_PushTextureEx((arena), \ - (GPU_TextureDesc) { \ - .kind = GPU_TextureKind_3D, \ - .format = (_format), \ - .dims = (_size), \ - .initial_layout = (_initial_layout), \ - __VA_ARGS__ \ - } \ +#define GPU_PushTexture3D(arena, _format, _size, _initial_layout, ...) GPU_PushTextureEx((arena), \ + (GPU_TextureDesc) { \ + .kind = GPU_TextureKind_3D, \ + .format = (_format), \ + .dims = (_size), \ + .initial_layout = (_initial_layout), \ + __VA_ARGS__ \ + } \ ) //- Shader handle creation @@ -594,23 +592,54 @@ void GPU_CopyTexels(GPU_CommandListHandle cl, GPU_ResourceHandle dst, Vec3I32 ds //- Constants -void GPU_SetConstU32 (GPU_CommandListHandle cl, i32 slot, u32 v); -void GPU_SetConstF32 (GPU_CommandListHandle cl, i32 slot, f32 v); -void GPU_SetConstStructuredBuffer (GPU_CommandListHandle cl, i32 slot, StructuredBufferHandle v); -void GPU_SetConstRWStructuredBuffer (GPU_CommandListHandle cl, i32 slot, RWStructuredBufferHandle v); -void GPU_SetConstTexture1D (GPU_CommandListHandle cl, i32 slot, Texture1DHandle v); -void GPU_SetConstRWTexture1D (GPU_CommandListHandle cl, i32 slot, RWTexture1DHandle v); -void GPU_SetConstTexture2D (GPU_CommandListHandle cl, i32 slot, Texture2DHandle v); -void GPU_SetConstRWTexture2D (GPU_CommandListHandle cl, i32 slot, RWTexture2DHandle v); -void GPU_SetConstTexture3D (GPU_CommandListHandle cl, i32 slot, Texture3DHandle v); -void GPU_SetConstRWTexture3D (GPU_CommandListHandle cl, i32 slot, RWTexture3DHandle v); -void GPU_SetConstSampler (GPU_CommandListHandle cl, i32 slot, SamplerHandle v); +void GPU_SetConstantU32_ (GPU_CommandListHandle cl, i32 slot, u32 v); +void GPU_SetConstantF32_ (GPU_CommandListHandle cl, i32 slot, f32 v); +void GPU_SetConstantStructuredBufferHandle_ (GPU_CommandListHandle cl, i32 slot, StructuredBufferHandle v); +void GPU_SetConstantRWStructuredBufferHandle_ (GPU_CommandListHandle cl, i32 slot, RWStructuredBufferHandle v); +void GPU_SetConstantTexture1DHandle_ (GPU_CommandListHandle cl, i32 slot, Texture1DHandle v); +void GPU_SetConstantRWTexture1DHandle_ (GPU_CommandListHandle cl, i32 slot, RWTexture1DHandle v); +void GPU_SetConstantTexture2DHandle_ (GPU_CommandListHandle cl, i32 slot, Texture2DHandle v); +void GPU_SetConstantRWTexture2DHandle_ (GPU_CommandListHandle cl, i32 slot, RWTexture2DHandle v); +void GPU_SetConstantTexture3DHandle_ (GPU_CommandListHandle cl, i32 slot, Texture3DHandle v); +void GPU_SetConstantRWTexture3DHandle_ (GPU_CommandListHandle cl, i32 slot, RWTexture3DHandle v); +void GPU_SetConstantSamplerHandle_ (GPU_CommandListHandle cl, i32 slot, SamplerHandle v); + +#define GPU_SetConstantU32(cl, name, v) GPU_SetConstantU32_((cl), ShaderConstant(u32, name), (v)) +#define GPU_SetConstantF32(cl, name, v) GPU_SetConstantF32_((cl), ShaderConstant(f32, name), (v)) +#define GPU_SetConstantStructuredBufferHandle(cl, name, v) GPU_SetConstantStructuredBufferHandle_((cl), ShaderConstant(StructuredBufferHandle, name), (v)) +#define GPU_SetConstantRWStructuredBufferHandle(cl, name, v) GPU_SetConstantRWStructuredBufferHandle_((cl), ShaderConstant(RWStructuredBufferHandle, name), (v)) +#define GPU_SetConstantTexture1DHandle(cl, name, v) GPU_SetConstantTexture1DHandle_((cl), ShaderConstant(Texture1DHandle, name), (v)) +#define GPU_SetConstantRWTexture1DHandle(cl, name, v) GPU_SetConstantRWTexture1DHandle_((cl), ShaderConstant(RWTexture1DHandle, name), (v)) +#define GPU_SetConstantTexture2DHandle(cl, name, v) GPU_SetConstantTexture2DHandle_((cl), ShaderConstant(Texture2DHandle, name), (v)) +#define GPU_SetConstantRWTexture2DHandle(cl, name, v) GPU_SetConstantRWTexture2DHandle_((cl), ShaderConstant(RWTexture2DHandle, name), (v)) +#define GPU_SetConstantTexture3DHandle(cl, name, v) GPU_SetConstantTexture3DHandle_((cl), ShaderConstant(Texture3DHandle, name), (v)) +#define GPU_SetConstantRWTexture3DHandle(cl, name, v) GPU_SetConstantRWTexture3DHandle_((cl), ShaderConstant(RWTexture3DHandle, name), (v)) +#define GPU_SetConstantSamplerHandle(cl, name, v) GPU_SetConstantSamplerHandle_((cl), ShaderConstant(SamplerHandle, name), (v)) //- Barrier void GPU_BarrierEx(GPU_CommandListHandle cl, GPU_BarrierDesc desc); -#define GPU_GlobalBarrier(_cl, _sync_prev, _sync_next, _access_prev, _access_next) \ +#define GPU_MemoryBarrier(_cl, _resource, _sync_prev, _access_prev, _sync_next, _access_next) \ + GPU_BarrierEx((_cl), (GPU_BarrierDesc) { \ + .resource = (_resource), \ + .sync_prev = _sync_prev, \ + .sync_next = _sync_next, \ + .access_prev = _access_prev, \ + .access_next = _access_next, \ + }) + +#define GPU_LayoutBarrier(_cl, _resource, _sync_prev, _access_prev, _sync_next, _access_next, _layout) \ + GPU_BarrierEx((_cl), (GPU_BarrierDesc) { \ + .resource = (_resource), \ + .sync_prev = _sync_prev, \ + .sync_next = _sync_next, \ + .access_prev = _access_prev, \ + .access_next = _access_next, \ + .layout = _layout, \ + }) + +#define GPU_GlobalBarrier(_cl, _sync_prev, _access_prev, _sync_next, _access_next) \ GPU_BarrierEx((_cl), (GPU_BarrierDesc) { \ .is_global = 1, \ .sync_prev = _sync_prev, \ @@ -619,33 +648,14 @@ void GPU_BarrierEx(GPU_CommandListHandle cl, GPU_BarrierDesc desc); .access_next = _access_next, \ }) -#define GPU_MemoryBarrier(_cl, _resource, _sync_prev, _sync_next, _access_prev, _access_next) \ - GPU_BarrierEx((_cl), (GPU_BarrierDesc) { \ - .resource = (_resource), \ - .sync_prev = _sync_prev, \ - .sync_next = _sync_next, \ - .access_prev = _access_prev, \ - .access_next = _access_next, \ - }) - -#define GPU_LayoutBarrier(_cl, _resource, _layout, _sync_prev, _sync_next, _access_prev, _access_next) \ - GPU_BarrierEx((_cl), (GPU_BarrierDesc) { \ - .resource = (_resource), \ - .layout = _layout, \ - .sync_prev = _sync_prev, \ - .sync_next = _sync_next, \ - .access_prev = _access_prev, \ - .access_next = _access_next, \ - }) - -#define GPU_DumbGlobalBarrier(_cl) \ - GPU_GlobalBarrier((_cl), GPU_Stage_All, GPU_Stage_All, GPU_Access_All, GPU_Access_All) - -#define GPU_DumbMemoryBarrier(_cl, _resource) \ - GPU_MemoryBarrier((_cl), (_resource), GPU_Stage_All, GPU_Stage_All, GPU_Access_All, GPU_Access_All) +#define GPU_DumbMemoryBarrier(_cl, _resource) \ + GPU_MemoryBarrier((_cl), (_resource), GPU_Stage_All, GPU_Access_All, GPU_Stage_All, GPU_Access_All) #define GPU_DumbLayoutBarrier(_cl, _resource, _layout) \ - GPU_LayoutBarrier((_cl), (_resource), (_layout), GPU_Stage_All, GPU_Stage_All, GPU_Access_All, GPU_Access_All) + GPU_LayoutBarrier((_cl), (_resource), GPU_Stage_All, GPU_Access_All, GPU_Stage_All, GPU_Access_All, (_layout)) + +#define GPU_DumbGlobalBarrier(_cl) \ + GPU_GlobalBarrier((_cl), GPU_Stage_All, GPU_Access_All, GPU_Stage_All, GPU_Access_All) //- Compute diff --git a/src/gpu/gpu_dx12/gpu_dx12.c b/src/gpu/gpu_dx12/gpu_dx12.c index f4b8312a..449709e8 100644 --- a/src/gpu/gpu_dx12/gpu_dx12.c +++ b/src/gpu/gpu_dx12/gpu_dx12.c @@ -215,7 +215,7 @@ void GPU_D12_Startup(void) d3d_desc.Flags = desc.flags; d3d_desc.NumDescriptors = desc.max; - HRESULT hr = 1; + HRESULT hr = 0; if (SUCCEEDED(hr)) { @@ -575,7 +575,7 @@ GPU_D12_RawCommandList *GPU_D12_PrepareRawCommandList(GPU_QueueKind queue_kind) GPU_D12_SharedState *g = &GPU_D12_shared_state; GPU_D12_Queue *queue = GPU_D12_QueueFromKind(queue_kind); - /* Pull first completed command list from queue if ready */ + /* Try to pull first completed command list from queue */ GPU_D12_RawCommandList *cl = ZI; { Lock lock = LockE(&queue->commit_mutex); @@ -642,13 +642,19 @@ GPU_D12_RawCommandList *GPU_D12_PrepareRawCommandList(GPU_QueueKind queue_kind) /* Reset command list */ { - HRESULT hr = ID3D12CommandAllocator_Reset(cl->d3d_ca); - if (FAILED(hr)) + HRESULT hr = 0; { - Panic(Lit("Failed to reset command allocator")); + if (SUCCEEDED(hr)) + { + hr = ID3D12CommandAllocator_Reset(cl->d3d_ca); + } + + if (SUCCEEDED(hr)) + { + hr = ID3D12GraphicsCommandList_Reset(cl->d3d_cl, cl->d3d_ca, 0); + } } - hr = ID3D12GraphicsCommandList_Reset(cl->d3d_cl, cl->d3d_ca, 0); if (FAILED(hr)) { Panic(Lit("Failed to reset command list")); @@ -1388,6 +1394,15 @@ GPU_D12_Cmd *GPU_D12_PushCmd(GPU_D12_CmdList *cl) return cmd; } +GPU_D12_Cmd *GPU_D12_PushConstCmd(GPU_D12_CmdList *cl, i32 slot, void *v) +{ + GPU_D12_Cmd *cmd = GPU_D12_PushCmd(cl); + cmd->kind = GPU_D12_CmdKind_Constant; + cmd->constant.slot = slot; + CopyBytes(&cmd->constant.value, v, 4); + return cmd; +} + //////////////////////////////////////////////////////////// //~ @hookimpl Command @@ -1432,6 +1447,11 @@ void GPU_CommitCommandListEx(GPU_CommandListHandle cl_handle, GPU_QueueKind queu b32 descriptor_heaps_set = 0; GPU_D12_Pipeline *bound_pipeline = 0; + /* Constants state */ + u32 slotted_constants[MaxShaderConstants] = ZI; + u32 bound_graphics_constants[MaxShaderConstants] = ZI; + u32 bound_compute_constants[MaxShaderConstants] = ZI; + /* Rasterizer state */ D3D12_VIEWPORT bound_viewport = ZI; D3D12_RECT bound_scissor = ZI; @@ -1478,22 +1498,19 @@ void GPU_CommitCommandListEx(GPU_CommandListHandle cl_handle, GPU_QueueKind queu GPU_D12_Cmd *cmd = &cmds[cmd_idx]; switch (cmd->kind) { + /* Batch-interrupting cmds */ + default: + { + cmd_idx += 1; + batch_gen += 1; + } break; + /* Non-batch-interrupting cmds */ case GPU_D12_CmdKind_Constant: { cmd_idx += 1; } break; - /* Batch-interrupting cmds */ - case GPU_D12_CmdKind_Copy: - case GPU_D12_CmdKind_Compute: - case GPU_D12_CmdKind_Rasterize: - case GPU_D12_CmdKind_ClearRtv: - { - cmd_idx += 1; - batch_gen += 1; - } break; - case GPU_D12_CmdKind_Barrier: { /* Determine 'before' state from lookup */ @@ -1545,7 +1562,19 @@ void GPU_CommitCommandListEx(GPU_CommandListHandle cl_handle, GPU_QueueKind queu cmd_idx += 1; } break; - //- Access + //- Constant + case GPU_D12_CmdKind_Constant: + { + i32 slot = cmd->constant.slot; + u32 value = cmd->constant.value; + if (slot > 0 && slot < countof(slotted_constants) && slotted_constants[slot] != value) + { + slotted_constants[slot] = value; + } + cmd_idx += 1; + } break; + + //- Barrier case GPU_D12_CmdKind_Barrier: { @@ -1748,6 +1777,8 @@ void GPU_CommitCommandListEx(GPU_CommandListHandle cl_handle, GPU_QueueKind queu if (!compute_rootsig_set) { ID3D12GraphicsCommandList_SetComputeRootSignature(d3d_cl, g->bindless_rootsig); + ID3D12GraphicsCommandList_SetComputeRoot32BitConstants(d3d_cl, 0, MaxShaderConstants, slotted_constants, 0); + CopyBytes(bound_compute_constants, slotted_constants, sizeof(bound_compute_constants)); compute_rootsig_set = 1; } @@ -1758,6 +1789,17 @@ void GPU_CommitCommandListEx(GPU_CommandListHandle cl_handle, GPU_QueueKind queu bound_pipeline = pipeline; } + /* Update root constants */ + for (i32 slot = 0; slot < MaxShaderConstants; ++slot) + { + u32 v = slotted_constants[slot]; + if (bound_compute_constants[slot] != v) + { + ID3D12GraphicsCommandList_SetComputeRoot32BitConstant(d3d_cl, 0, v, slot); + bound_compute_constants[slot] = v; + } + } + /* Dispatch */ ID3D12GraphicsCommandList_Dispatch(d3d_cl, cmd->compute.groups.x, cmd->compute.groups.y, cmd->compute.groups.z); } @@ -1851,6 +1893,8 @@ void GPU_CommitCommandListEx(GPU_CommandListHandle cl_handle, GPU_QueueKind queu if (!graphics_rootsig_set) { ID3D12GraphicsCommandList_SetGraphicsRootSignature(d3d_cl, g->bindless_rootsig); + ID3D12GraphicsCommandList_SetGraphicsRoot32BitConstants(d3d_cl, 0, MaxShaderConstants, slotted_constants, 0); + CopyBytes(bound_graphics_constants, slotted_constants, sizeof(bound_graphics_constants)); graphics_rootsig_set = 1; } @@ -1861,14 +1905,16 @@ void GPU_CommitCommandListEx(GPU_CommandListHandle cl_handle, GPU_QueueKind queu bound_pipeline = pipeline; } - // /* Fill signature */ - // /* TODO: Only upload dirty */ - // { - // u32 sig_size = cmd->rasterize.sig_size; - // void *sig = cmd->rasterize.sig; - // u32 num32bit = sig_size / 4; - // ID3D12GraphicsCommandList_SetGraphicsRoot32BitConstants(d3d_cl, 0, num32bit, sig, 0); - // } + /* Update root constants */ + for (i32 slot = 0; slot < MaxShaderConstants; ++slot) + { + u32 v = slotted_constants[slot]; + if (bound_graphics_constants[slot] != v) + { + ID3D12GraphicsCommandList_SetGraphicsRoot32BitConstant(d3d_cl, 0, v, slot); + bound_graphics_constants[slot] = v; + } + } /* Set viewport */ { @@ -2109,59 +2155,59 @@ void GPU_CopyTexels(GPU_CommandListHandle cl, GPU_ResourceHandle dst, Vec3I32 ds //- Constants -void GPU_SetConstU32(GPU_CommandListHandle cl_handle, i32 slot, u32 v) +void GPU_SetConstantU32_(GPU_CommandListHandle cl_handle, i32 slot, u32 v) { - /* TODO */ + GPU_D12_PushConstCmd(GPU_D12_CmdListFromHandle(cl_handle), slot, &v); } -void GPU_SetConstF32(GPU_CommandListHandle cl_handle, i32 slot, f32 v) +void GPU_SetConstantF32_(GPU_CommandListHandle cl_handle, i32 slot, f32 v) { - /* TODO */ + GPU_D12_PushConstCmd(GPU_D12_CmdListFromHandle(cl_handle), slot, &v); } -void GPU_SetConstStructuredBuffer(GPU_CommandListHandle cl_handle, i32 slot, StructuredBufferHandle v) +void GPU_SetConstantStructuredBufferHandle_(GPU_CommandListHandle cl_handle, i32 slot, StructuredBufferHandle v) { - /* TODO */ + GPU_D12_PushConstCmd(GPU_D12_CmdListFromHandle(cl_handle), slot, &v); } -void GPU_SetConstRWStructuredBuffer(GPU_CommandListHandle cl_handle, i32 slot, RWStructuredBufferHandle v) +void GPU_SetConstantRWStructuredBufferHandle_(GPU_CommandListHandle cl_handle, i32 slot, RWStructuredBufferHandle v) { - /* TODO */ + GPU_D12_PushConstCmd(GPU_D12_CmdListFromHandle(cl_handle), slot, &v); } -void GPU_SetConstTexture1D(GPU_CommandListHandle cl_handle, i32 slot, Texture1DHandle v) +void GPU_SetConstantTexture1DHandle_(GPU_CommandListHandle cl_handle, i32 slot, Texture1DHandle v) { - /* TODO */ + GPU_D12_PushConstCmd(GPU_D12_CmdListFromHandle(cl_handle), slot, &v); } -void GPU_SetConstRWTexture1D(GPU_CommandListHandle cl_handle, i32 slot, RWTexture1DHandle v) +void GPU_SetConstantRWTexture1DHandle_(GPU_CommandListHandle cl_handle, i32 slot, RWTexture1DHandle v) { - /* TODO */ + GPU_D12_PushConstCmd(GPU_D12_CmdListFromHandle(cl_handle), slot, &v); } -void GPU_SetConstTexture2D(GPU_CommandListHandle cl_handle, i32 slot, Texture2DHandle v) +void GPU_SetConstantTexture2DHandle_(GPU_CommandListHandle cl_handle, i32 slot, Texture2DHandle v) { - /* TODO */ + GPU_D12_PushConstCmd(GPU_D12_CmdListFromHandle(cl_handle), slot, &v); } -void GPU_SetConstRWTexture2D(GPU_CommandListHandle cl_handle, i32 slot, RWTexture2DHandle v) +void GPU_SetConstantRWTexture2DHandle_(GPU_CommandListHandle cl_handle, i32 slot, RWTexture2DHandle v) { - /* TODO */ + GPU_D12_PushConstCmd(GPU_D12_CmdListFromHandle(cl_handle), slot, &v); } -void GPU_SetConstTexture3D(GPU_CommandListHandle cl_handle, i32 slot, Texture3DHandle v) +void GPU_SetConstantTexture3DHandle_(GPU_CommandListHandle cl_handle, i32 slot, Texture3DHandle v) { - /* TODO */ + GPU_D12_PushConstCmd(GPU_D12_CmdListFromHandle(cl_handle), slot, &v); } -void GPU_SetConstRWTexture3D(GPU_CommandListHandle cl_handle, i32 slot, RWTexture3DHandle v) +void GPU_SetConstantRWTexture3DHandle_(GPU_CommandListHandle cl_handle, i32 slot, RWTexture3DHandle v) { - /* TODO */ + GPU_D12_PushConstCmd(GPU_D12_CmdListFromHandle(cl_handle), slot, &v); } -void GPU_SetConstSampler(GPU_CommandListHandle cl_handle, i32 slot, SamplerHandle v) +void GPU_SetConstantSamplerHandle_(GPU_CommandListHandle cl_handle, i32 slot, SamplerHandle v) { - /* TODO */ + GPU_D12_PushConstCmd(GPU_D12_CmdListFromHandle(cl_handle), slot, &v); } //- Barrier @@ -2467,8 +2513,8 @@ GPU_ResourceHandle GPU_PrepareBackbuffer(GPU_SwapchainHandle swapchain_handle, G ZeroStruct(backbuffer); backbuffer->d3d_resource = d3d_resource; backbuffer->uid = Atomic64FetchAdd(&g->resource_creation_gen.v, 1) + 1; + backbuffer->flags = GPU_ResourceFlag_AllowRenderTarget; backbuffer->is_texture = 1; - backbuffer->texture_flags = GPU_TextureFlag_AllowRenderTarget; backbuffer->texture_dims = VEC3I32(size.x, size.y, 1); backbuffer->texture_mip_levels = 1; backbuffer->texture_layout = D3D12_BARRIER_LAYOUT_PRESENT; diff --git a/src/gpu/gpu_dx12/gpu_dx12.h b/src/gpu/gpu_dx12/gpu_dx12.h index 8e7bc44a..70fa016f 100644 --- a/src/gpu/gpu_dx12/gpu_dx12.h +++ b/src/gpu/gpu_dx12/gpu_dx12.h @@ -115,15 +115,14 @@ Struct(GPU_D12_Resource) GPU_D12_Resource *next_free; ID3D12Resource *d3d_resource; u64 uid; + GPU_ResourceFlag flags; /* Buffer info */ - GPU_BufferFlag buffer_flags; u64 buffer_size; D3D12_GPU_VIRTUAL_ADDRESS buffer_gpu_address; /* Texture info */ b32 is_texture; - GPU_TextureFlag texture_flags; GPU_Format texture_format; Vec3I32 texture_dims; i32 texture_mip_levels; @@ -196,6 +195,12 @@ Struct(GPU_D12_Cmd) b32 skip; union { + struct + { + i32 slot; + u32 value; + } constant; + struct { GPU_BarrierDesc desc; @@ -205,12 +210,6 @@ Struct(GPU_D12_Cmd) u64 batch_gen; } barrier; - struct - { - i32 slot; - u32 value; - } constant; - struct { GPU_D12_Resource *dst; @@ -381,6 +380,7 @@ void GPU_D12_CommitRawCommandList(GPU_D12_RawCommandList *cl); //~ Command helpers GPU_D12_Cmd *GPU_D12_PushCmd(GPU_D12_CmdList *cl); +GPU_D12_Cmd *GPU_D12_PushConstCmd(GPU_D12_CmdList *cl, i32 slot, void *v); //////////////////////////////////////////////////////////// //~ Sync job diff --git a/src/proto/proto.c b/src/proto/proto.c index 4075d421..f8ac347c 100644 --- a/src/proto/proto.c +++ b/src/proto/proto.c @@ -28,17 +28,37 @@ JobImpl(PR_RunForever, _sig, _id) GPU_ResourceHandle backbuffer = GPU_PrepareBackbuffer(swapchain, GPU_Format_R16G16B16A16_Float, window_frame.draw_size); { - /* Draw to backbuffer */ GPU_CommandListHandle cl = GPU_PrepareCommandList(); { + /* Push resources */ + Vec2I32 final_target_size = window_frame.draw_size; + GPU_ResourceHandle final_target = GPU_PushTexture2D(gpu_frame_arena, + GPU_Format_R16G16B16A16_Float, + final_target_size, + GPU_Layout_DirectQueue_ShaderReadWrite, + .flags = GPU_ResourceFlag_AllowShaderReadWrite | GPU_ResourceFlag_AllowRenderTarget); + + /* Push resource handles */ + RWTexture2DHandle final_target_rwhandle = GPU_PushRWTexture2DHandle(gpu_frame_arena, final_target); + + /* Prep test pass */ + { + GPU_SetConstantU32(cl, PR_DConst_TestConst, 5); + } + + /* Test pass */ + { + GPU_Compute(cl, PR_TestCS, VEC3I32((final_target_size.x + 7) / 8, (final_target_size.y + 7) / 8, 1)); + } + + GPU_DumbMemoryBarrier(cl, final_target); /* Prep clear pass */ { GPU_LayoutBarrier(cl, backbuffer, - GPU_Layout_DirectQueue_RenderTargetWrite, - GPU_Stage_None, GPU_Stage_RenderTarget, - GPU_Access_None, GPU_Access_RenderTargetWrite); - // GPU_DumbLayoutBarrier(cl, backbuffer, GPU_Layout_DirectQueue_RenderTargetWrite); + GPU_Stage_None, GPU_Access_None, + GPU_Stage_RenderTarget, GPU_Access_RenderTargetWrite, + GPU_Layout_DirectQueue_RenderTargetWrite); } /* Clear pass */ @@ -49,10 +69,9 @@ JobImpl(PR_RunForever, _sig, _id) /* Finalize backbuffer layout */ { GPU_LayoutBarrier(cl, backbuffer, - GPU_Layout_AnyQueue_ShaderRead_CopyRead_CopyWrite_Present, - GPU_Stage_RenderTarget, GPU_Stage_None, - GPU_Access_RenderTargetWrite, GPU_Access_None); - // GPU_DumbLayoutBarrier(cl, backbuffer, GPU_Layout_AnyQueue_ShaderRead_CopyRead_CopyWrite_Present); + GPU_Stage_RenderTarget, GPU_Access_RenderTargetWrite, + GPU_Stage_None, GPU_Access_None, + GPU_Layout_AnyQueue_ShaderRead_CopyRead_CopyWrite_Present); } /* Reset */ diff --git a/src/proto/proto.lay b/src/proto/proto.lay index 81ad5541..35e3a08d 100644 --- a/src/proto/proto.lay +++ b/src/proto/proto.lay @@ -1,14 +1,19 @@ @Layer proto //- Dependencies - @Dep gpu @Dep window -//- Impl +//- Api +@IncludeC proto_shaders.h +@IncludeGpu proto_shaders.h +//- Impl @IncludeC proto.c +@IncludeGpu proto_shaders.gpu + +//- Shaders +@ComputeShader PR_TestCS //- Startup - @Startup PR_Startup diff --git a/src/proto/proto_shaders.gpu b/src/proto/proto_shaders.gpu new file mode 100644 index 00000000..7aed54c1 --- /dev/null +++ b/src/proto/proto_shaders.gpu @@ -0,0 +1,15 @@ + +//////////////////////////////////////////////////////////// +//~ Test shader + +ComputeShader2D(PR_TestCS, 8, 8) +{ + RWTexture2D target_tex = ResourceFromConstantHandle(RWTexture2DHandle, PR_DConst_TestTarget); + Vec2U32 target_tex_size = Count2D(target_tex); + + Vec2U32 id = SV_DispatchThreadID; + if (id.x < target_tex_size.x && id.y < target_tex_size.y) + { + target_tex[id] = Vec4(0, 1, 0, 1); + } +} diff --git a/src/proto/proto_shaders.h b/src/proto/proto_shaders.h new file mode 100644 index 00000000..547b42e2 --- /dev/null +++ b/src/proto/proto_shaders.h @@ -0,0 +1,6 @@ + +Enum(PR_DConst) +{ + ShaderConstant(RWTexture2DHandle, PR_DConst_TestTarget), + ShaderConstant(u32, PR_DConst_TestConst), +};