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jacob 2025-12-07 10:03:24 -06:00
parent 702d33613f
commit 0559ba8cba
2 changed files with 32 additions and 32 deletions
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56
src/gpu/gpu_core.h
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@ -610,42 +610,42 @@ void GPU_SetConstant_(GPU_CommandListHandle cl, i32 slot, void *src_32bit, u32 s
void GPU_BarrierEx(GPU_CommandListHandle cl, GPU_BarrierDesc desc); void GPU_BarrierEx(GPU_CommandListHandle cl, GPU_BarrierDesc desc);
#define GPU_MemoryBarrier(_cl, _resource, _sync_prev, _access_prev, _sync_next, _access_next) \ #define GPU_MemorySync(_cl, _resource, _sync_prev, _access_prev, _sync_next, _access_next) \
GPU_BarrierEx((_cl), (GPU_BarrierDesc) { \ GPU_BarrierEx((_cl), (GPU_BarrierDesc) { \
.resource = (_resource), \ .resource = (_resource), \
.sync_prev = _sync_prev, \ .sync_prev = _sync_prev, \
.sync_next = _sync_next, \ .sync_next = _sync_next, \
.access_prev = _access_prev, \ .access_prev = _access_prev, \
.access_next = _access_next, \ .access_next = _access_next, \
}) })
#define GPU_MemoryLayoutBarrier(_cl, _resource, _sync_prev, _access_prev, _sync_next, _access_next, _layout) \ #define GPU_MemoryLayoutSync(_cl, _resource, _sync_prev, _access_prev, _sync_next, _access_next, _layout) \
GPU_BarrierEx((_cl), (GPU_BarrierDesc) { \ GPU_BarrierEx((_cl), (GPU_BarrierDesc) { \
.resource = (_resource), \ .resource = (_resource), \
.sync_prev = _sync_prev, \ .sync_prev = _sync_prev, \
.sync_next = _sync_next, \ .sync_next = _sync_next, \
.access_prev = _access_prev, \ .access_prev = _access_prev, \
.access_next = _access_next, \ .access_next = _access_next, \
.layout = _layout, \ .layout = _layout, \
}) })
#define GPU_GlobalMemoryBarrier(_cl, _sync_prev, _access_prev, _sync_next, _access_next) \ #define GPU_GlobalMemorySync(_cl, _sync_prev, _access_prev, _sync_next, _access_next) \
GPU_BarrierEx((_cl), (GPU_BarrierDesc) { \ GPU_BarrierEx((_cl), (GPU_BarrierDesc) { \
.is_global = 1, \ .is_global = 1, \
.sync_prev = _sync_prev, \ .sync_prev = _sync_prev, \
.sync_next = _sync_next, \ .sync_next = _sync_next, \
.access_prev = _access_prev, \ .access_prev = _access_prev, \
.access_next = _access_next, \ .access_next = _access_next, \
}) })
#define GPU_DumbMemoryBarrier(cl, resource) \ #define GPU_DumbMemorySync(cl, resource) \
GPU_MemoryBarrier((cl), (resource), GPU_Stage_All, GPU_Access_All, GPU_Stage_All, GPU_Access_All) GPU_MemorySync((cl), (resource), GPU_Stage_All, GPU_Access_All, GPU_Stage_All, GPU_Access_All)
#define GPU_DumbMemoryLayoutBarrier(cl, resource, layout) \ #define GPU_DumbMemoryLayoutSync(cl, resource, layout) \
GPU_MemoryLayoutBarrier((cl), (resource), GPU_Stage_All, GPU_Access_All, GPU_Stage_All, GPU_Access_All, (layout)) GPU_MemoryLayoutSync((cl), (resource), GPU_Stage_All, GPU_Access_All, GPU_Stage_All, GPU_Access_All, (layout))
#define GPU_DumbGlobalMemoryBarrier(cl) \ #define GPU_DumbGlobalMemorySync(cl) \
GPU_GlobalMemoryBarrier((cl), GPU_Stage_All, GPU_Access_All, GPU_Stage_All, GPU_Access_All) GPU_GlobalMemorySync((cl), GPU_Stage_All, GPU_Access_All, GPU_Stage_All, GPU_Access_All)
//- Compute //- Compute

8
src/proto/proto.c
View File

@ -54,12 +54,12 @@ void PT_RunForever(WaveLaneCtx *lane)
{ {
GPU_Compute(cl, PT_TestCS, VEC3I32((final_target_size.x + 7) / 8, (final_target_size.y + 7) / 8, 1)); GPU_Compute(cl, PT_TestCS, VEC3I32((final_target_size.x + 7) / 8, (final_target_size.y + 7) / 8, 1));
} }
GPU_DumbMemoryBarrier(cl, final_target); GPU_DumbMemorySync(cl, final_target);
/* Prep blit pass */ /* Prep blit pass */
{ {
GPU_DumbMemoryLayoutBarrier(cl, final_target, GPU_Layout_DirectQueue_ShaderRead); GPU_DumbMemoryLayoutSync(cl, final_target, GPU_Layout_DirectQueue_ShaderRead);
GPU_DumbMemoryLayoutBarrier(cl, backbuffer, GPU_Layout_DirectQueue_RenderTargetWrite); GPU_DumbMemoryLayoutSync(cl, backbuffer, GPU_Layout_DirectQueue_RenderTargetWrite);
} }
/* Blit pass */ /* Blit pass */
@ -72,7 +72,7 @@ void PT_RunForever(WaveLaneCtx *lane)
/* Finalize backbuffer layout */ /* Finalize backbuffer layout */
{ {
GPU_DumbMemoryLayoutBarrier(cl, backbuffer, GPU_Layout_AnyQueue_ShaderRead_CopyRead_CopyWrite_Present); GPU_DumbMemoryLayoutSync(cl, backbuffer, GPU_Layout_AnyQueue_ShaderRead_CopyRead_CopyWrite_Present);
} }
/* Reset */ /* Reset */